4707 dey road liverpool, n.y. 13088 m.s.kennedy corp. (315) 701-6751 features: industry wide lh0033/el2005 replacement low input offset - 2mv low input offset drift - 25 v/c fet input, low input current - 50pa high slew rate - 1500v/ s wide bandwidth - 140mhz high output current - 100ma available to dla smd 5962-80014 description: fet input high speed voltage follower/buffer amplifier sample and hold impedance buffers for a to d's high speed line drivers crt deflection driver 1 2 3 4 5 6 positive driver power supply n/c n/c n/c input offset preset offset adjust n/c negative driver power supply negative power supply output positive power supply 7 8 9 10 11 12 0033 pin-out information typical applications 1 mil-prf-38534 certified facility equivalent schematic the msk 0033(b) is a high speed, wide bandwidth voltage follower/buffer amplifier that is pin compatible with all other 0033 designs. the fet input is cascaded to force the input characteristics to remain constant over the full input voltage range. significantly improved performance in sample and hold circuits is achieved since the dc bias current remains constant with input voltage. the fet input also makes the msk 0033 very accurate since it produces extremely low input bias current, input offset voltage and input offset voltage drift specifications. transistion times in the range of 2.5 ns make the msk 0033 fast enough for most high speed voltage follower/buffer amplifier applica- tions. 8548-8 rev. e 12/11
v in =0v short pin 6 to pin 7 v in =0v short pin 6 to pin 7 v in =0v pin 6=open r pot =200 from pin 7 to pin 9 v cm =0v either input f=dc 10v v s 20v f=10hz to 1khz f=1khz v in =14v r l =1k v in =10.5v r l =100 2v step v in =1v rms r l =1k v out =10v v out =10v r s =100 v in =1v rms f=1khz max. 18 22 10 250 100 10 - - - - - - - - - - - 1 2 3 4 5 6 7 8 9 10 absolute maximum ratings t st t ld t j r th storage temperature range lead temperature range (10 seconds) junction temperature thermal resistance junction to case output devices only supply voltage output current differential input voltage case operating temperature (msk 0033b) (msk 0033) -65c to +150c 300c 175c 65c/w 20v 120ma 20v -55c to +125c -40c to +85c v cc i out v in t c group a subgroup - 1 1 2,3 1,2,3 1 2,3 - - - - 4 4 - - 4 4 4 static supply voltage range quiescent current input offset voltage offset voltage drift offset adjust input bias current 9 input impedance 3 power supply rejection ratio 2 input noise density 3 input noise voltage 3 output output voltage swing output current settling time to 1% 2 3 bandwidth (-3db) 3 transfer characteristics slew rate-rising edge slew rate-falling edge voltage gain typ. 15 19 2.0 25 50 2 10 75 1.5 40 12.5 110 25 140 1500 700 0.99 min. 10 - - - - - - 65 - - 12 90 - - 1000 500 0.97 min. 10 - - - - - - 60 - - 12 90 - - 1000 500 0.95 max. 18 25 15 - 500 - - - - - - - - - - - - typ. 15 19 5 - 50 2 10 75 1.5 40 12.5 110 25 140 1500 700 0.98 units v ma mv v/c mv pa na db vrms nv/ hz v ma ns mhz v/ s v/ s v/v msk 0033b msk 0033 parameter adjust to zero adjust to zero 12 12 test conditions unless otherwise specified vcc = 15 vdc. measured within a high speed amplifier feedback loop. devices shall be capable of meeting the parameter, but need not be tested. typical parameters are for reference only. industrial grade devices shall be tested to subgroups 1 and 4 unless otherwise specified. military grade devices ('b' suffix) shall be 100% tested to subgroups 1,2,3 and 4. subgroup 5 and 6 testing available upon request. subgroup 1,4 t a =t c =+25c subgroup 2,5 t a =t c =+125c subgroup 3,6 t a =t c =-55c electrical specifications are derated for power supply voltages other than 15vdc. measurement made 0.5 seconds after application of power. actual dc continuous test limit is 2.5 na at 25c. continuous operation at or above absolute maximum ratings may adversely effect the device performance and/or life cycle. electrical specifications 2 notes: 8 3 10 8548-8 rev. e 12/11
heat sinking to determine if a heat sink is necessary for your application and if so, what type, refer to the thermal model and governing equation below. example: this example demonstrates a worst case analysis for the buffer output stage. this occurs when the output voltage is 1/2 the power supply voltage. under this condition, maximum power transfer occurs and the output is under maximum stress. conditions: v cc = 16vdc v o = 8vp sine wave, freq. = 1khz r l = 100 governing equation: t j =p d x (r jc + r cs + r sa ) + t a where t j = junction temperature p d = total power dissipation r jc = junction to case thermal resistance r cs = case to heat sink thermal resistance r sa = heat sink to ambient thermal resistance t c = case temperature t a = ambient temperature t s = sink temperature r sa = ((t j - t a )/p d ) - (r jc ) - (r cs ) = ((125c - 80c) / .64w) - 65c/w - .15c/w = 70.3 - 65.15 = 5.2c/w the heat sink in this example must have a thermal resistance of no more than 5.2c/w to maintain a junction temperature of no more than +125c. thermal model: for a worst case analysis we will treat the 8vp sine wave as an 8 vdc output voltage. 1.) find driver power dissipation p d = (v cc -v o ) (v o /r l ) = (16v-8v) (8v/100 ) = 640mw 2.) for conservative design, set t j =+125c max. 3.) for this example, worst case t a =+80c 4.) r jc = 65c/w from msk 0033b data sheet 5.) r cs = 0.15c/w for most thermal greases 6.) rearrange governing equation to solve for r sa power supply bypassing both the negative and the positive power supplies must be effectively decoupled with a high and low frequency bypass circuit to avoid power supply induced oscillation. an effective decoupling scheme consists of a 0.1 microfarad ceramic ca- pacitor in parallel with a 4.7 microfarad tantalum capacitor from each power supply pin to ground. application notes offset voltage adjust see figure 1. to externally null the offset voltage, connect a 200 potentiometer between pins 7 and 10 and leave pin 6 open. if offset null is not necessary, short pin 6 to pin 7 and remove the 200 potentiometer. do not connect pin 7 to - vcc. current limiting see figure 1. if no current limit is required, short pin 1 to pin 12 and pin 9 to pin 10 and delete q1 thru q4 connections. q1 through q4 and the rlim resistors form a current source current limit scheme and current limit resistor values can be calculated as follows: +rlim ? vbe -rlim ? vbe isc isc since current limit is directly proportional to the base-emitter voltage drop of the 2n2222's and 2n2907's in the current limit scheme, the current limit value will change slightly with ambient temperature changes. the base-emitter voltage drop will decrease as temperature increases causing the actual cur- rent limit point to decrease. 3 8548-8 rev. e 12/11
typical applications 4 8548-8 rev. e 12/11
typical performance curves 5 8548-8 rev. e 12/11
ordering information screening level msk0033 industrial the information contained herein is believed to be accurate at the time of printing. msk reserves the right to make changes to its products or specifications without notice, however, and assumes no liability for the use of its products. please visit our website for the most recent revision of this datasheet. mechanical specifications m.s. kennedy corp. 4707 dey road, liverpool, new york 13088 phone (315) 701-6751 fax (315) 701-6752 www.mskennedy.com part number all dimensions are 0.010 inches unless otherwise labeled 6 msk0033b mil-prf-38534 class h 8001401ZX dla - smd weight=2.8 grams typical 8548-8 rev. e 12/11
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